Bayesian Filtering on FPGA: Enhancing Low-Cost Ultrasonic Sensor Reliability for Distance Measurement

FPGA Image

This project focuses on implementing an adaptive Bayesian filter on an FPGA to enhance the accuracy of low-cost sensors, specifically the HC-SR04 ultrasonic sensor. The filter, based on Bayesian networks, is developed using VHDL and processes floating-point data. Experimental results demonstrate improvements in the variance of the filtered measurements compared to the raw readings, although optimizing the filter parameters remains a challenge. The project validates the model’s functionality and suggests that large-scale testing could be a valuable direction for future research. Read More

Making Even More with Much Less: Improving Software Testing Outcomes Using a Cross-Project and Cross-Language ML Classifier Based on Cost-Sensitive Training on Class-Weighted Dataset

Corner Case Generation

TBD

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